HY5PS56421LF-E3 Datasheet, PDF (5/35 Pages) Hynix Semiconductor – 256Mb DDR2 SDRAM

1.2 Pin Configuration & Address Table
64Mx4 DDR2 Pin Configuration
HY5PS56421(L)F
HY5PS56821(L)F
HY5PS561621(L)F
1
2
3
7
8
9
VDD
NC
VSS
A
VSSQ
DQS
VDDQ
NC
VSSQ
DM
B
DQS
VSSQ
NC
VDDQ
DQ1
VDDQ
C
VDDQ
DQ0
VDDQ
NC
VSSQ
DQ3
D
DQ2
VSSQ
NC
VDDL
VREF
VSS
CKE
WE
E
VSSDL
CK
VDD
F
RAS
CK
ODT
NC
BA0
BA1
G
CAS
CS
A10
A1
H
A2
A0
VDD
VSS
A3
A5
J
A6
A4
A7
A9
K
A11
A8
VSS
VDD
A12
NC
L
NC
A13
ROW AND COLUMN ADDRESS TABLE
ITEMS
# of Bank
Bank Address
Auto Precharge Flag
Row Address
Column Address
Page size
64Mx4
4
BA0, BA1
A10/AP
A0 - A12
A0-A9, A11
1 KB
Rev 1.0 / July. 2004
5