HY57V643220CT Datasheet, PDF (6/12 Pages) Hynix Semiconductor – 4 Banks x 512K x 32Bit Synchronous DRAM

HY57V643220C
DC CHARACTERISTICS II (DC operating conditions unless otherwise noted)
Parameter
Operating Current
Precharge Standby
Current
in power down mode
Precharge Standby
Current
in non power down mode
Active Standby Current
in power down mode
Active Standby Current
in non power down mode
Burst Mode Operating
Current
Auto Refresh Current
Self Refresh Current
Symbol
Test Condition
Speed
Unit Note
-47
-5 -55 -6
-7
-8
-P
-S
IDD1
Burst Length=1, One bank active
tRAS ≥tRAS(min), tRP ≥tRP(min),
IOL=0mA
220 200 190 180 170 150 150 150 mA
1
IDD2P
IDD2PS
CKE ≤VIL(max), tCK = 15ns
CKE ≤VIL(max), tCK = ∞
2
mA
2
CKE ≥VIH(min), CS ≥VIH(min), tCK = 15ns
IDD2N
Input signals are changed one time during
15
2clks. All other pins ≥VDD-0.2V or ≤0.2V
mA
IDD2NS
CKE ≥ VIH(min), tCK = ∞
10
Input signals are stable.
IDD3P
IDD3PS
CKE ≤VIL(max), tCK = 15ns
CKE ≤VIL(max), tCK = ∞
3
mA
3
CKE ≥VIH(min), CS ≥VIH(min), tCK = 15ns
IDD3N
Input signals are changed one time during
40
2clks. All other pins ≥VDD-0.2V or ≤0.2V
mA
IDD3NS
CKE ≥ VIH(min), tCK = ∞Input signals are
25
stable
IDD4
tCK ≥ tCK(min),
tRAS ≥ tRAS(min), IOL=0mA
All banks active
CL=3
CL=2
290 280 260 240 210 180 180 180
mA
1
160 160 160 160 160 160 160
IDD5
tRRC ≥ tRRC(min), 2 banks active
260 250 235 220 210 190 210 190 mA
2
IDD6
CKE ≤ 0.2V
2
3
mA
1
4
Note :
1.IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open
2.Min. of tRRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS II
3.HY57V643220CT-47/5/55/6/7/8/P/S
4.HY57V643220CLT-47/5/55/6/7/8/P/S
Rev. 0.8/Aug. 02
6