HY57V643220CT Datasheet, PDF (3/12 Pages) Hynix Semiconductor – 4 Banks x 512K x 32Bit Synchronous DRAM

FUNCTIONAL BLOCK DIAGRAM
512Kbit x 4banks x 32 I/O Synchronous DRAM
Self Refresh Logic
& Timer
Refresh
Counter
HY57V643220C
CLK
CKE
CS
RAS
CAS
WE
DQM0
DQM1
DQM2
DQM3
Row Active
Row
Pre
Decoder
Column
Active
Column
Pre
Decoder
512Kx32 Bank 3
512Kx32 Bank 2
512Kx32 Bank 1
512Kx32 Bank 0
Memory
Cell
Array
Y decoder
DQ0
DQ1
DQ30
DQ31
Bank Select
Column Add
Counter
A0
Address
A1
Register
Burst
Counter
A10
BA0
BA1
Mode Register
CAS Latency
Data Out Control ^{Pipe Line Control}
Rev. 0.8/Aug. 02
3