GM71CS17403C Datasheet, PDF (4/10 Pages) Hynix Semiconductor – 4,194,304 WORDS x 4 BIT CMOS DYNAMIC RAM

GM71C(S)17403C/CL
Capacitance (VCC = 5V+/-10%, TA = 25C)
Symbol
Parameter
Min Max Unit
CI1
Input Capacitance (Address)
-
5
pF
CI2
Input Capacitance (Clocks)
-
7
pF
CI/O
Output Capacitance (Data-In/Out)
-
7
pF
Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. CAS = VIH to disable DOUT.
AC Characteristics (VCC = 5V+/-10%, TA = 0 ~ 70C, Notes 1, 2, 18, 19)
Test Conditions
Input rise and fall times: 2 ns
Input timing reference levels: 0.8V, 2.4V
Output timing reference levels: 0.8V, 2.0V
Output load : 1 TTL gate + CL (100pF)
(Including scope and jig)
Note
1
1
1, 2
Read, Write, Read-Modify-Write and Refresh Cycles (Common Parameters)
Symbol
Parameter
tRC
Random Read or Write Cycle Time
tRP
RAS Precharge Time
GM71C(S)17403 GM71C(S)17403 GM71C(S)17403
C/CL-5
C/CL-6
C/CL-7
Min Max Min Max Min Max
Unit
84 - 104 - 124 - ns
30 - 40 - 50 - ns
Note
tCP
CAS Precharge Time
7 - 10 - 13 - ns
tRAS
RAS Pulse Width
tCAS
CAS Pulse Width
tASR
Row Address Set up Time
tRAH
Row Address Hold Time
tASC
Column Address Set-up Time
tCAH
Column Address Hold Time
tRCD
RAS to CAS Delay Time
tRAD
RAS to Column Address Delay Time
tRSH
RAS Hold Time
tCSH
CAS Hold Time
tCRP
CAS to RAS Precharge Time
tODD
OE to DIN Delay Time
tDZO
OE Delay Time from DIN
tDZC
CAS Delay Time from DIN
tT
Transition Time (Rise and Fall)
50 10,000 60 10,000 70 10,000 ns
21
7 10,000 10 10,000 13 10,000 ns
22
0-
0-
0 - ns
7 - 10 - 10 - ns
0-
0-
0 - ns
7 - 10 - 13 - ^ns
11 37 14 45 14 52 ns
3
9 25 12 30 12 35 ns
4
10 - 13 - 13 - ns
35 - 40 - 45 - ns
24
5-
5-
5 - ns
13 - 15 - 18 - ns
5
0-
0-
0 - ns
6
0-
0-
0 - ns
6
2 50 2 50 2 50 ns
7
Rev 0.1 / Apr’01