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HY5DV281622DT Datasheet, PDF (30/31 Pages) Hynix Semiconductor – 128M(8Mx16) GDDR SDRAM
HY5DV281622DT
CAPACITANCE (TA=25oC, f=1MHz )
Parameter
Input Clock Capacitance
Input Capacitance
Input / Output Capacitanc
Pin
CK, CK
All other input-only pins
DQ, DQS, DM
Symbol
Min
Max
Unit
CCK
2.0
3.0
pF
CIN
2.0
3.0
pF
CIO
4.0
5.0
pF
Note :
1. VDD = min. to max., VDDQ = 2.3V to 2.7V, VODC = VDDQ/2, VOpeak-to-peak = 0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
VTT
RT=50Ω
Output
Zo=50Ω
CL=30pF
VREF
Rev. 0.5 / Aug. 2003
30