HY5DV281622DT Datasheet, PDF (24/31 Pages) Hynix Semiconductor – 128M(8Mx16) GDDR SDRAM

DC CHARACTERISTICS II (TA=0 to 70^oC, Voltage referenced to VSS = 0V)
HY5DV281622DT
Parameter Symbol
Test Condition
33
Operating Current
One bank; Active - Precharge;
tRC=tRC(min); tCK=tCK(min); DQ,DM and
IDD0 DQS inputs changing twice per clock cycle; 150
address and control inputs changing once
per clock cycle
Operating Current
One bank; Active - Read - Precharge;
IDD1
Burst=2; tRC=tRC(min); tCK=tCK(min);
address and control inputs changing once
170
per clock cycle; IOUT=0mA
Precharge Power
Down Standby
Current
IDD2P
All banks idle; Power down mode; CKE=Low,
tCK=tCK(min)
/CS=High, All banks idle; tCK=tCK(min);
Idle Standby Current
IDD2F
CKE=High; address and control inputs
changing once per clock cycle.
90
VIN=VREF for DQ, DQS and DM
Active Power Down
Standby Current
IDD3P
One bank active; Power down mode ;
CKE=Low, tCK=tCK(min)
Active Standby
Current
/CS=HIGH; CKE=HIGH; One bank; Active-
Precharge; tRC=tRAS(max); tCK=tCK(min);
IDD3N DQ, DM and DQS inputs changing twice per 90
clock cycle; Address and other control inputs
changing once per clock cycle
Burst=2; Reads; Continuous burst; One
Operating Current
IDD4R
bank active; Address and control inputs
changing once per clock cycle;
250
tCK=tCK(min); IOUT=0mA
Burst=2; Writes; Continuous burst; One
bank active; Address and control inputs
Operating Current
IDD4W changing once per clock cycle;
210
tCK=tCK(min); DQ, DM and DQS inputs
changing twice per clock cycle
Auto Refresh Current IDD5 tRC=tRFC(min); All banks active
220
Self Refresh Current
IDD6
CKE=<0.2V; External clock on;
tCK=tCK(min)
Operating Current -
Four Bank Operation
IDD7 Four bank interleaving with BL=4
350
Speed
36 4 5
140 130 120
150 140 130
20
80
70
60
20
80
70
60
230 210 180
190 170 150
200 180 150
2
330 310 270
Unit Note
6
100 mA
110 mA
mA
50 mA
mA
50 mA
160 mA
140 mA
140 mA
mA
250 mA
Rev. 0.5 / Aug. 2003
24