STAC9704 Datasheet, PDF (25/49 Pages) Hynix Semiconductor – Multimedia Audio Codec for AC97

SigmaTel, Inc.
STAC9704/7
4.4 Mixer Registers:
Table 9. Mixer Registers
REG #
00h
NAME
Reset
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
DE
FAULT
X SE4 SE3 SE2 SE1 SE0 ID9 ID8 ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0 NA
02h Master Volume Mute X X ML4 ML3 ML2 ML1 ML0 X X X MR4 MR3 MR2 MR1 MR0 8000h
04h LNLVL Volume Mute X X ML4 ML3 ML2 ML1 ML0 X X X MR4 MR3 MR2 MR1 MR0 8000h
06h Master Volume Mute X X X X X X X X X X MM4 MM3 MM2 MM1 MM0 8000h
Mono
0Ah PC_BEEP Volume Mute X X X X X X X X X X PV3 PV2 PV1 PV0 X 0000h
0Ch Phone volume Mute X X X X X X X X X X GN4 GN3 GN2 GN1 GN0 8008h
0Eh Mic Volume Mute X X X X X X X X 20dB X GN4 GN3 GN2 GN1 GN0 8008h
10h Line In Volume Mute X X GL4 GL3 GL2 GL1 GL0 X X X GR4 GR3 GR2 GR1 GR0 8808h
12h CD Volume Mute X X GL4 GL3 GL2 GL1 GL0 X X X GR4 GR3 GR2 GR1 GR0 8808h
14h Video Volume Mute X X GL4 GL3 GL2 GL1 GL0 X X X GR4 GR3 GR2 GR1 GR0 8808h
16h AUX Volume Mute X X GL4 GL3 GL2 GL1 GL0 X X X GR4 GR3 GR2 GR1 GR0 8808h
18h PCM Out Volume Mute X X GL4 GL3 GL2 GL1 GL0 X X X GR4 GR3 GR2 GR1 GR0 8808h
1Ah Record Select
X
X
X
X
X SL2 SL1 SL0 X
X
X
X
X SR2 SR1 SR0 0000h
1Ch Record Gain Mute X X X GL3 GL2 GL1 GL0 X X X X GR3 GR2 GR1 GR0 8000h
20h General Purpose X
X 3D X
X
X MIX MS LPBK X
X
X
X
X
X
X 0000h
22h 3D Control
X
X
X
X
X
X
X
X
X
X
X
X
X
X DP1 DP0 0000h
26h Powerdown PR7 PR6 PR5 PR4 PR3 PR2 PR1 PR0 X X X X REF ANL DAC ADC 000Fh
Ctrl/Stat
7Ch Vendor ID1
1
0
0
0
0
0
1
1
1
0
0
0
0
1
0
0
NA
7Eh Vendor ID2
0
1
1
1
0
1
1
0
0
0
0
0
0
1
0
0
NA
Notes:
1. All registers not shown and bits containing an X are reserved.
2. Any reserved bits, marked X, can be written to but are don’t care upon read back.
3. PC_BEEP default to 0000h, mute off.
4. If optional bits D13, D5 of register 02H or D5 of register 06h are set to 1, then the corresponding attenuation
is set to 46dB and the register reads will produce 3Fh as a value for this attenuation/gain block.
25
10/02/98