STAC9704 Datasheet, PDF (21/49 Pages) Hynix Semiconductor – Multimedia Audio Codec for AC97

SigmaTel, Inc.
STAC9704/7
Cold Reset - a cold reset is achieved by asserting RESET# for the minimum specified time. By driving
RESET# low, BIT_CLK, and SDATA_IN will be activated, or re-activated as the case may be, and all
STAC9704/7 control registers will be initialized to their default power on reset values.
Note: RESET# is an asynchronous input.
# denotes active low
Warm Reset - a warm reset will re-activate the AC-link without altering the current STAC9704/7
register values. A warm reset is signaled by driving SYNC high for a minimum of 1 us in the absence
of BIT_CLK.
Note: Within normal audio frames, SYNC is a synchronous input. However, in the absence
of BIT_CLK, SYNC is treated as an asynchronous input used in the generation of a warm
reset to the STAC9704/7.
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10/02/98