GMS90C320 Datasheet, PDF (23/46 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR INC. 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS90C320
Table 8
Interrupt Sources and their Corresponding Interrupt Vectors
Source (Request Flags)
IE0
TF0
IE1
TF1
RI+TI
TF2+EXF2
Vector
External interrupt 0
Timer 0 interrupt
External interrupt 1
Timer 1 interrupt
Serial port interrupt
Timer 2 interrupt
Vector Address
0003_H
000B_H
0013_H
001B_H
0023_H
002B_H
A low-priority interrupt can itself be interrupted by a high-priority interrupt, but not by another low priority interrupt. A high-
priority interrupt cannot be interrupted by any other interrupt source.
If two requests of different priority level are received simultaneously, the request of higher priority is serviced. If requests of
the same priority are received simultaneously, an internal polling sequence determines which request is serviced. Thus within
each priority level there is a second priority structure determined by the polling sequence as shown in Table 9.
Table 9
Interrupt Priority-Within-Level
IE0
TF0
IE1
TF1
RI+TI
TF2+EXF2
Interrupt Source
External interrupt 0
Timer 0 interrupt
External interrupt 1
Timer 1 interrupt
Serial port interrupt
Timer 2 interrupt
Priority
High
↓
Low
OCT. 2000 Ver 1.2
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