GMS90C320 Datasheet, PDF (19/46 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR INC. 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS90C320
Timer / Counter 0 and 1
Timer/Counter 0 and 1 can be used in four operating modes as listed in Table 4:
Table 4
Timer/Counter 0 and 1 Operating Modes
Mode
Description
TMOD
GATE C/T
M1
M0
0
8-bit timer/counter with a
divide-by-32 prescaler
1
16-bit timer/counter
X
X
0
0
X
X
0
1
2
8-bit timer/counter with 8-bit
autoreload
X
X
1
0
3
Timer/counter 0 used as one
8-bit timer/counter and one 8-
bit timer
X
X
1
1
Timer 1 stops
Input Clock
Internal
External
(Max.)
---^ƒ---^O----^S----^C-----
12 × 32
---^ƒ---^O----^S----^C-----
24 × 32
-^ƒ---^O----^S----^C---
12
-^ƒ---^O----^S----^C---
24
-^ƒ---^O----^S----^C---
12
-^ƒ---^O----^S----^C---
24
-^ƒ---^O----^S----^C---
12
-^ƒ---^O----^S----^C---
24
In the “timer” function (C/T = “0”) the register is incremented every machine cycle. Therefore the count rate is ƒ_OSC ⁄ 12 .
In the “counter” function the register is incremented in response to a 1-to-0 transition at its corresponding external input pin
(P3.4/T0, P3.5/T1). Since it takes two machine cycles to detect a falling edge the max. count rate is ƒ_OSC ⁄ 24 . External inputs
INT0 and INT1 (P3.2, P3.3) can be programmed to function as a gate to facilitate pulse width measurements.
Figure 2 illustrates the input clock logic.
f_{O SC}
÷12
P3.4/T0
P3.5/T1
max. fOSC/24
P3.2/INT0
P3.3/INT1
TR 0/1
TCON
GATE
TMOD
Figure 2 Timer/Counter 0 and 1 Input Clock Logic
C/T
TMOD
0
1
ƒ_OSC ⁄ 12
Timer 0/1
Input Clock
Control
OCT. 2000 Ver 1.2
15