English
Language : 

HY62LF16206B-DT12C Datasheet, PDF (2/11 Pages) Hynix Semiconductor – 128Kx16bit full CMOS SRAM
DESCRIPTION
The HY62LF16206B is a high speed, super low
power and 2Mbit full CMOS SRAM organized as
128K words by 16bits. The HY62LF16206B uses
high performance full CMOS process technology
and is designed for high speed and low power
circuit technology. It is particularly well-suited for
the high density low power system application.
This device has a data retention mode that
guarantees data to remain valid at a minimum
power supply voltage of 1.2V.
HY62LF16206B-DT12C
128Kx16bit full CMOS SRAM
FEATURES
• Fully static operation and Tri-state output
• TTL compatible inputs and outputs
• Battery backup(L-part)
-. 1.2V(min) data retention
• Standard pin configuration
-. 48-TSOP1
Product
Voltage
No.
(V)
HY62LF16206B
2.3~2.7
Notes :
1. Current value is max.
Speed
(ns)
120
Operation
Current/Icc(mA)
1
Standby Current(uA)
D
20
Temperature
(°C)
0~70
PIN CONNECTION
BLOCK DIAGRAM
A15
1
A14
2
A13
3
A12
4
A11
5
A10
6
A9
7
A8
8
NC
9
NC
10
/WE
11
CS2
12
NC
13
/UB
14
/LB
15
NC
16
NC
17
A7
18
A6
19
A5
20
A4
21
A3
22
A2
23
A1
24
48-TSOP1(Forward)
PIN CONNECTION
48
A16
47
NC
46
VSS
45
IO16
44
IO8
43
IO15
42
IO7
41
IO14
40
IO6
39
IO13
38
IO5
37
VCC
36
IO12
35
IO4
34
IO11
33
IO3
32
IO10
31
IO2
30
IO9
29
IO1
28
/OE
27
VSS
26
/CS1
25
A0
A0
A16
/CS1
CS2
/OE
/LB
/UB
/WE
Pin Name
/CS1
CS2
/WE
/OE
/LB
/UB
Pin Function
Chip Select 1
Chip Select 2
Write Enable
Output Enable
Lower Byte Control(I/O1~I/O8)
Upper Byte Control(I/O9~I/O16)
Pin Name
I/O1~I/O16
A0~A16
Vcc
Vss
NC
ROW
DECODER
MEMORY ARRAY
128K x 16
Pin Function
Data Inputs / Outputs
Address Inputs
Power(2.3V~2.7V)
Ground
No Connection
I/O1
I/O16
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.00 /Apr. 2003
Hynix Semiconductor