HMP512U6FFP8C-Y5 Datasheet, PDF (2/25 Pages) Hynix Semiconductor – 240pin DDR2 SDRAM Unbuffered DIMMs based on 512 Mb F ver.

1240pin DDR2 SDRAM Unbuffered DIMMs
SPEED GRADE & KEY PARAMETERS
Speed @CL3
Speed @CL4
Speed @CL5
Speed @CL6
CL-tRCD-tRP
E3
C4
Y5
(DDR2-400) (DDR2-533) (DDR2-667)
400
533
-
-
3-3-3
533
533
-
-
4-4-4
400
533
667
-
5-5-5
S5
(DDR2-800)
400
533
800
800
5-5-5
S6
(DDR2-800)
-
533
667
800
6-6-6
Unit
Mbps
Mbps
Mbps
Mbps
tCK
ADDRESS TABLE
Density Organization Ranks
SDRAMs
# of
DRAMs
# of row/bank/column Address
Refresh
Method
512MB 64M x 72
1
64Mb x 8
9
14(A0~A13)/2(BA0~BA1)/10(A0~A9) 8K / 64ms
1GB 128M x 64
2
64Mb x 8
16
14(A0~A13)/2(BA0~BA1)/10(A0~A9) 8K / 64ms
1GB 128M x 72
2
64Mb x 8
18
14(A0~A13)/2(BA0~BA1)/10(A0~A9) 8K / 64ms
Rev. 0.1 / June 2008
2