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HY5DU12422AT Datasheet, PDF (18/33 Pages) Hynix Semiconductor – 512Mb DDR SDRAM
HY5DU12422A(L)T
HY5DU12822A(L)T
HY5DU121622A(L)T
7. Issue 2 or more Auto Refresh commands.
8. Issue a Mode Register Set command to initialize the mode register with bit A8 = Low
Power-Up Sequence
VDD
VDDQ
VTT
VREF
/CLK
CLK
CKE
CMD
DM
ADDR
A10
BA0,BA1
DQS
DQ’s
tVTD
tIS tIH
NOP
PRE
EMRS
MRS
NOP
PRE
AREF
MRS
CODE
CODE
CODE
CODE
CODE
CODE
CODE
CODE
CODE
T=200usec
tRP
tMRD
200 cycles of CK*
tRP
tRFC
Power up
VDD and CK stable
EMRS Set
Precharge All
MRS Set
Reset DLL
(with A8=H)
2 or more MRS Set
Precharge All Auto Refresh (with A8=L)
*200 cycles of CK are required (for DLL locking) before any executable command can be applied.
Rev. 0.0/Feb. 2003
18