HY5DU573222F Datasheet, PDF(16/30 Page) Hynix Semiconductor

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

HY5DU573222F Datasheet, PDF (16/30 Pages) Hynix Semiconductor – 256M(8Mx32) GDDR SDRAM

◁

1HY5DU573222F(P)

7. Issue 2 or more Auto Refresh commands.

8. Issue a Mode Register Set command to initialize the mode register with bit A8 = Low.

Power-Up Sequence

VDD

VDDQ

VTT

VREF

/CLK

CLK

tVTD

CKE

CMD

LVCMOS Low Level

tIS tIH

NOP

PRE

EMRS

MRS

NOP

PRE

AREF

MRS

ACT

ADDR

CODE

A10

CODE

BA0, BA1

DQS

DQ'S

CODE

T=200usec

Power UP

VDD and CK stable

tRP

tMRD

tRP

tRFC

tMRD

Precharge All

EMRS Set MRS Set

Reset DLL

(with A8=H)

tXSRD*

Precharge All 2 or more

MRS Set

Auto Refresh (with A8=L)

Non-Read

Command

READ

* 200 cycle(tXSRD) of CK are required (for DLL locking) before Read Command

Rev. 1.1 / May. 2005

▷