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AMMC-3040 Datasheet, PDF (5/6 Pages) Agilent(Hewlett-Packard) – 18-36 GHz Double-Balanced Mixer with Integrated LO Amplifier/Multiplier
To VDD DC Drain
Supply Feed
Gold Plated Shim
(optional)
100 pF
Cb
LO
IF
0.6 pF
~500 µm long
wire
To VDD DC Drain
Supply Feed
100 pF
Gold Plated Shim
Cb
(optional)
LO
RF
IF
0.6 pF
~500 µm long
wire
RF
100 pF
100 pF
100 pF
Cb
To VGG DC Gate
Supply Feed
To VGG DC Gate
Supply Feed
Cb
Cb
To VGG DC Gate
Supply Feed
(a) Fundamental LO. Single drain and single gate supply assembly for using (b) Sub-harmonic LO. Separate first-stage gate bias supply to use the LO
the LO amplifier in fundamental frequency mixer applications.
amplifier as a multiplier for application as a sub-harmonic mixer.
(Note: To assure stable operation bias supply feeds should be bypassed to ground with a capacitor, Cb > 100 pF typical)
Figure 16. AMMC-3040 Assembly diagram.
Biasing for Fundamental Mixing
The recommended DC bias
condition for the AMMC- 3040
LO amplifier when used as a
fundamental frequency mixer is
with all four drains connected
to a single 3.5 to 4.5V supply
and all four gates connected to
an adjustable negative supply
voltage as shown in Figure 16
(a). The gate voltage is adjusted
for a total drain supply current
of typically 150 to 250 mA.
The second, third, and fourth
stage DC drain bias lines are
connected internally and
therefore require only a single
bond wire. A separate bond
wire is needed for the first
stage DC drain bias, Vd1.
The third and fourth stage DC
gate bias lines are connected
internally. A total of three DC
gate bond wires are required:
one for Vg1, one for Vg2, and
one for the Vg3 / Vg4 connection.
The internal matching circuitry
at the RF input creates a 50-
ohm DC and RF path to ground.
Any DC voltage applied to the
RF input must be maintained
below 1 volt, otherwise, a
blocking capacitor should be
used. The RF output is AC
coupled.
No ground bond wires are
needed since the ground
connection is made by means of
plated through via holes to the
backside of the chip.
Biasing for Sub-Harmonic Mixing
The LO amplifier in the AMMC-
3040 can also be used as a
frequency doubler. Optimum
conversion efficiency as a
doubler is obtained with an
input power level of 3 to 8
dBm.
Frequency multiplication is
achieved by reducing the bias
on the first stage FET to
efficiently generate harmonics.
The remaining three stages are
then used to provide
amplification.
While many bias methods could
be used to generate and amplify
the desired harmonics within
the AMMC- 3040’s LO amplifier,
the following information is
suggested as a starting point for
sub- harmonic mixing
applications.
Frequency doubling is
accomplished by biasing the
first stage FET at pinch- off by
setting Vg1 = Vp ≈ –1.1 volts.
The remaining three stages are
biased for normal amplification,
e.g., Vgg is adjusted such that
Id2 + Id3 + Id4 ≈ 250 mA. The
drain voltage, Vdd, for all four
stages should be 3.5 to 4.5 volts.
The assembly diagram shown in
Figure 16 (b) can be used as a
guideline.
In all cases, Cb > 100 pF to
assure stability.
IF Output Port
The IF output port is located
near the middle of the die,
allowing this connection to be
made from either side of the
chip for maximum layout
flexibility.
The LO and RF signals are
reflectively terminating at the IF
port by connecting a 20- mil
(500 um) long bond wire from
the IF output pad on the MMIC
to a shunt 0.6 pF chip capacitor
mounted off- chip as indicated
in Figure 16.
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