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HDMP-1526 Datasheet, PDF (4/14 Pages) Agilent(Hewlett-Packard) – Fibre Channel Transceiver Chip
HDMP-1526 (Transmitter Section)
Timing Characteristics
TC = 0°C to +85°C, VCC = 4.5 V to 5.25 V
Symbol
Parameter
tsetup
thold
t_txlat[1]
Setup Time
Hold Time
Transmitter Latency
Units
nsec
nsec
nsec
bits
Min.
2
1.5
Typ.
6.25
6.64
Max.
12.2
13.0
Note:
1. The transmitter latency, as shown in Figure 4, is defined as the time between the latching in of the parallel data word (as triggered
by the rising edge of the transmit byte clock, REFCLK) and the transmission of the first serial bit of that parallel word (defined by the
rising edge of the first bit transmitted).
,,,,,,, REFCLK
TX[0]-TX[9]
DATA
DATA
DATA
DATA
DATA
1.4 V
2.0 V
0.8 V
t-SETUP
t-HOLD
Figure 3. Transmitter Section Timing.
,, ,, DATABYTEA
DATA BYTE B
± DOUT T5 T6 T7 T8 T9 T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T0 T1 T2 T3 T4 T5
t_TXLAT
TX[0]-TX[9]
DATA BYTE B
DATA BYTE C
REFCLK
1.4 V
Figure 4. Transmitter Latency.
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