HFCT-5905E Datasheet, PDF (11/12 Pages) Agilent(Hewlett-Packard) – Agilent HFCT-5905E MT-RJ Duplex Single Mode Transceiver

Board Layout - Decoupling Circuit
and Ground Planes
It is important to take care in the
layout of your circuit board to
achieve optimum performance
from these transceivers. Figure 3
provides a good example of a
schematic for a power supply
decoupling circuit that works well
with these parts. It is further
recommended that a continuous
ground plane be provided in the
circuit board directly under the
transceiver to provide a low
inductance ground for signal
return current. This recommenda-
tion is in keeping with good high
frequency board layout practices.
Board Layout - Hole Pattern
The Agilent transceiver complies
with the circuit board “Common
Transceiver Footprint” hole
pattern defined in the original
multisource announcement which
defined the 2 x 5 package style.
This drawing is reproduced in
Figure 6 with the addition of ANSI
Y14.5M compliant dimensioning
to be used as a guide in the
mechanical layout of your circuit
board. Figure 7 shows the front
panel dimensions associated with
such a layout.
KEEP OUT AREA
FOR PORT PLUG
7
(0.276)
10.8
(0.425)
Ø 1.4 ±0.1
(0.055 ±0.004)
7.11
(0.28)
Ø 1.4 ±0.1
(0.055 ±0.004)
3.56
(0.14)
Holes For
Housing
Leads
10.16
(0.4)
13.97
(0.55)
MIN.
Ø 1.4 ±0.1
(0.055 ±0.004)
13.34 7.59
(0.525) (0.299)
3.08
(0.121)
9.59
(0.378)
2
(0.079)
3
(0.118)
3
(0.118)
6
27 ^(0.236)
(1.063)
4.57
(0.18)
1.778
(0.07)
17.78
(0.7)
7.112
(0.28)
Ø 2.29
(0.09)
3.08
(0.121)
Ø 0.81 ±0.1
(0.032 ±0.004)
DIMENSIONS IN MILLIMETERS (INCHES)
NOTES:
1. THIS FIGURE DESCRIBES THE RECOMMENDED CIRCUIT BOARD LAYOUT FOR THE MT-RJ TRANSCEIVER PLACED
AT .550 SPACING.
2. THE HATCHED AREAS ARE KEEP-OUT AREAS RESERVED FOR HOUSING STANDOFFS. NO METAL TRACES OR
GROUND CONNECTION IN KEEP-OUT AREAS.
3. 2 x 5 TRANSCEIVER MODULE REQUIRES 16 PCB HOLES (10 I/O PINS, 2 SOLDER POSTS AND 4 PACKAGE
GROUNDING TABS).
PACKAGE GROUNDING TABS SHOULD BE CONNECTED TO SIGNAL GROUND.
4. THE SOLDER POSTS SHOULD BE SOLDERED TO CHASSIS GROUND FOR MECHANICAL INTEGRITY AND TO
ENSURE FOOTPRINT COMPATIBILITY WITH OTHER SFF TRANSCEIVERS.
Figure 6. Recommended Board Layout Hole Pattern
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