HCPL-540X Datasheet, PDF (11/12 Pages) Agilent(Hewlett-Packard) – Hermetically Sealed, Very High Speed, Logic Gate Optocouplers

MIL-PRF-38534 Class H,
Class K, and DESC SMD
Test Program
Hewlett-Packard’s Hi-Rel Opto-
couplers are in compliance with
MIL-PRF-38534 Classes H and K.
Class H devices are also in
compliance with DESC drawings
5962-89570, and 5962-89571.
Testing consists of 100% screen-
ing and quality conformance
inspection to MIL-PRF-38534.
Data Rate and Pulse-
Width Distortion
Definitions
Propagation delay is a figure of
merit which describes the finite
amount of time required for a
system to translate information
from input to output when
shifting logic levels. Propagation
delay from low to high (t_PLH)
specifies the amount of time
required for a system’s output to
change from a Logic 0 to a Logic
1, when given a stimulus at the
input. Propagation delay from
high to low (t_PHL) specifies the
amount of time required for a
system’s output to change from a
Logic 1 to a Logic 0, when given
a stimulus at the input (see
Figure 5).
When t_PLH and t_PHL differ in
value, pulse width distortion
results. Pulse width distortion is
defined as |t_PHL - t_PLH| and
determines the maximum data
rate capability of a distortion-
limited system. Maximum pulse
width distortion on the order of
25-35% is typically used when
specifying the maximum data rate
capabilities of systems. The exact
figure depends on the particular
application (RS-232, PCM, T-1,
etc.).
These high performance opto-
couplers offer the advantages of
specified propagation delay (t_PLH,
t_PHL), and pulse width distortion
(|t_PLH -t _PHL|) over temperature
and power supply voltage ranges.
Applications
V_CC1 = +5 V
DATA
IN
A
GND 1
1
226 Ω ^{30 pF}
HCPL-5400
V_CC
274 Ω
TOTEM
POLE
OUTPUT GATE
(e.g. 54AS1000)
GND
Y=A
0.1 µF
V_CC2 = 5 V
TTL
LSTTL
STTL
HCMOS
DATA
OUT
Y
GND 2
2
Figure 13. Recommended HCPL-5400 Interface Circuit.
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