BH66F2260 Datasheet, PDF (49/214 Pages) Holtek Semiconductor Inc – R-Sensor Blood Pressure Meter Flash MCU

BH66F2260
R-Sensor Blood Pressure Meter Flash MCU
Programming Considerations
Care must be taken that data is not inadvertently written to the EEPROM. Protection can be
enhanced by ensuring that the Write Enable bit is normally cleared to zero when not writing. Also
the Memory Pointer high byte register, MP1H or MP2H, could be normally cleared to zero as this
would inhibit access to Sector 1 where the EEPROM control register exists. Although certainly not
necessary, consideration might be given in the application program to the checking of the validity of
new write data by a simple read back process.
When writing data the WR bit must be set high immediately after the WREN bit has been set high,
to ensure the write cycle executes correctly. The global interrupt bit EMI should also be cleared
before a write cycle is executed and then re-enabled after the write cycle starts. Note that the device
should not enter the IDLE or SLEEP mode until the EEPROM read or write operation is totally
complete. Otherwise, the EEPROM read or write operation will fail.
Programming Examples
• Reading data from the EEPROM – polling method
MOV A, EEPROM_ADRES
; user defined address
MOV EEA, A
MOV A, 40H
; setup memory pointer MP1L
MOV MP1L, A
; MP1 points to EEC register
MOV A, 01H
; setup memory pointer MP1H
MOV MP1H, A
SET IAR1.1
; set RDEN bit, enable read operations
SET IAR1.0
; start Read Cycle - set RD bit
BACK:
SZ IAR1.0
; check for read cycle end
JMP BACK
CLR IAR1
; disable EEPROM read/write
CLR MP1H
MOV A, EED
; move read data to register
MOV READ_DATA, A
• Writing Data to the EEPROM – polling method
MOV A, EEPROM_ADRES
; user defined address
MOV EEA, A
MOV A, EEPROM_DATA
; user defined data
MOV EED, A
MOV A, 40H
; setup memory pointer MP1L
MOV MP1L, A
; MP1 points to EEC register
MOV A, 01H
; setup memory pointer MP1H
MOV MP1H, A
CLR EMI
SET IAR1.3
; set WREN bit, enable write operations
SET IAR1.2
; start Write Cycle - set WR bit — executed immediately
; after set WREN bit
SET EMI
BACK:
SZ IAR1.2
; check for write cycle end
JMP BACK
CLR IAR1
; disable EEPROM read/write
CLR MP1H
Rev. 1.00
49
March 15, 2017