HT82B42R_14 Datasheet, PDF (41/84 Pages) Holtek Semiconductor Inc – I/O MCU with USB Interface

HT82B42R/HT82B42RE
I/O MCU with USB Interface
More information regarding external reset circuits is located in Application Note HA0075E on the
Holtek website.
This type of reset occurs when the microcontroller is already running and the RES pin is
forcefully pulled low by external hardware such as an external switch. In this case as in the case
of other reset, the Program Counter will reset to zero and program execution initiated from this
point. Note that as the external reset pin is also pin-shared with PE2 if it is to be used as a reset
pin, the correct reset configuration option must be selected.
RES
S S T T im e - o u t
0 .4 V D D
0 .9 V D D
tR S T D
In te rn a l R e s e t
RES Reset Timing Chart
• Low Voltage Reset – LVR
The microcontroller contains a low voltage reset circuit in order to monitor the supply voltage of
the device. The LVR function is selected via a configuration option. If the supply voltage of the
device drops to within a range of 0.9V~VLVR such as might occur when changing the battery, the
LVR will automatically reset the device internally. For a valid LVR signal, a low supply voltage,
i.e., a voltage in the range between 0.9V~VLVR must exist for a time greater than that specified by
tLVR in the A.C. characteristics. If the low supply voltage state does not exceed this value, the LVR
will ignore the low supply voltage and will not perform a reset function. The actual VLVR value
can be selected via configuration options.
LV R
tR S T D
S S T T im e - o u t
In te rn a l R e s e t
Low Voltage Reset Timing Chart
• Watchdog Time-out Reset during Normal Operation
The Watchdog time-out Reset during normal operation is the same as a hardware RES pin reset
except that the Watchdog time-out flag TO will be set to "1".
W D T T im e - o u t
tR S T D
S S T T im e - o u t
In te rn a l R e s e t
WDT Time-out Reset during Normal Operation Timing Chart
• Watchdog Time-out Reset during Power Down
The Watchdog time-out Reset during Power Down is a little different from other kinds of reset.
Most of the conditions remain unchanged except that the Program Counter and the Stack Pointer
will be cleared to "0" and the TO flag will be set to "1". Refer to the A.C. Characteristics for tSST
details.
W D T T im e - o u t
tS S T
S S T T im e - o u t
WDT Time-out Reset during Power Down Timing Char
Rev. 1.10
41
November 05, 2014