HT82B42R_14 Datasheet, PDF (21/84 Pages) Holtek Semiconductor Inc – I/O MCU with USB Interface

HT82B42R/HT82B42RE
I/O MCU with USB Interface
B ank0
00H
IA R 0
40H
01H
M P0
41H
02H
IA R 1
42H
03H
M P1
43H
04H
BP
44H
05H
ACC
45H
06H
PCL
46H
07H
TB LP
47H
08H
TB LH
48H
09H
W D TS
49H
0A H
STATU S
4A H
0B H
IN T C 0
0C H
0D H
TM R 0
0E H
TM R 0C
0FH
TM R 1H
10H
TM R 1L
11H
TM R 1C
12H
PA
13H
PAC
14H
PB
15H
PBC
16H
17H
18H
19H
1A H
PE
1B H
PEC
1C H
S P IR
1D H
1E H
IN T C 1
1FH
TBH P
20H
USC
21H
USR
22H
SCC
23H
SBCR
24H
SBDR
: U n u s e d re a d a s "0 "
B ank1
U S B _S TA T
P IP E _ C T R L
AW R
S TA LL
P IP E
S IE S
M IS C
E N D P T_E N
F IF O 0
F IF O 1
F IF O 2
Special Purpose Data Memory
Special Function Registers
To ensure successful operation of the microcontroller, certain internal registers are implemented in
the Data Memory area. These registers ensure correct operation of internal functions such as timers,
interrupts, etc., as well as external functions such as I/O data control. The location of these registers
within the Data Memory begins at the address 00H. Any unused Data Memory locations between
these special function registers and the point where the General Purpose Memory begins is reserved
and attempting to read data from these locations will return a value of 00H.
Indirect Addressing Register – IAR0, IAR1
The Indirect Addressing Registers, IAR0 and IAR1, although having their locations in normal RAM
register space, do not actually physically exist as normal registers. The method of indirect addressing
for RAM data manipulation uses these Indirect Addressing Registers and Memory Pointers, in
contrast to direct memory addressing, where the actual memory address is specified. Actions on the
IAR0 and IAR1 registers will result in no actual read or write operation to these registers but rather
to the memory location specified by their corresponding Memory Pointer, MP0 or MP1. Acting as
a pair, IAR0 and MP0 can together only access data from Bank 0, while the IAR1 and MP1 register
pair can access data from both Bank 0 and Bank 1. As the Indirect Addressing Registers are not
physically implemented, reading the Indirect Addressing Registers indirectly will return a result of
"00H" and writing to the registers indirectly will result in no operation.
Rev. 1.10
21
November 05, 2014