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HT82B42R_14 Datasheet, PDF (37/84 Pages) Holtek Semiconductor Inc – I/O MCU with USB Interface
HT82B42R/HT82B42RE
I/O MCU with USB Interface
INTC1 Register
Bit
7
6
5
4
3
2
1
0
Name
―
―
―
SIF
―
―
―
ESII
R/W
―
―
―
R/W
―
―
―
R/W
POR
―
―
―
0
―
―
―
0
Bit 7~5
Bit 4
Bit 3~1
Bit 0
Unimplemented, read as “0”
SIF: SPI interrupt request flag
0: inactive
1: active
Unimplemented, read as “0”
ESII: SPI interrupt enable
0: disable
1: enable
Interrupt Operation
When a USB interrupt occurs, a SPI insterrupt takes place, or one of the Timer/Event Counters
overflow, if their appropriate interrupt enable bit is set, the Program Counter, which stores the
address of the next instruction to be executed, will be transferred onto the stack. The Program
Counter will then be loaded with a new address which will be the value of the corresponding
interrupt vector. The microcontroller will then fetch its next instruction from this interrupt vector.
The instruction at this vector will usually be a JMP statement which will jump to another section
of program which is known as the interrupt service routine. Here is located the code to control the
appropriate interrupt. The interrupt service routine must be terminated with a RETI statement, which
retrieves the original Program Counter address from the stack and allows the microcontroller to
continue with normal execution at the point where the interrupt occurred.
The various interrupt enable bits, together with their associated request flags, are shown in the
accompanying diagram with their order of priority.
Once an interrupt subroutine is serviced, all the other interrupts will be blocked, as the EMI bit will
be cleared automatically. This will prevent any further interrupt nesting from occurring. However,
if other interrupt requests occur during this interval, although the interrupt will not be immediately
serviced, the request flag will still be recorded. If an interrupt requires immediate servicing while the
program is already in another interrupt service routine, the EMI bit should be set after entering the
routine, to allow interrupt nesting. If the stack is full, the interrupt request will not be acknowledged,
even if the related interrupt is enabled, until the Stack Pointer is decremented. If immediate service
is desired, the stack must be prevented from becoming full.
A u to m a tic a lly C le a r e d b y IS R
M a n u a lly S e t o r C le a r e d b y S o ftw a r e
A u to m a tic a lly D is a b le d b y IS R
C a n b e E n a b le d M a n u a lly
P r io r ity
U S B In te rru p t
EUI
EM I
H ig h
R e q u e s t F la g U S B F
T im e r /E v e n t C o u n te r 0 O v e r flo w
E T0I
In te r r u p t R e q u e s t F la g T 0 F
In te rru p t
P o llin g
T im e r /E v e n t C o u n te r 1 O v e r flo w
E T1I
In te r r u p t R e q u e s t F la g T 1 F
S P I In te rru p t
E S II
R e q u e s t F la g S IF
Low
Interrupt Structure
Rev. 1.10
37
November 05, 2014