HD74LV165A Datasheet, PDF (9/17 Pages) Hitachi Semiconductor – Parallel-Load 8-bit Shift Register

HD74LV165A
Switching Characteristics (cont)
• V_CC = 5.0 ± 0.5 V
Ta = 25°C
Ta = –40 to 85°C
Item
Symbol Min Typ Max Min
Max
Test
Unit Conditions
Maximum fmax
110 165 — 90
—
clock
frequency
MHz C_L = 15 pF
95
Propa-
gation
t_PLH/t_PHL —
delay time
125 — 85
6.0 9.9 1.0
—
11.5
C_L = 50 pF
ns
C_L = 15 pF
Setup time t_su
—
7.7 11.9 1.0
—
6.0 9.9 1.0
—
7.7 11.9 1.0
—
6.0 9.0 1.0
—
7.6 11.0 1.0
3.5 — — 3.5
5.0 — — 5.0
13.5
11.5
13.5
10.5
12.5
—
—
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
ns
4.0 — — 4.0
—
ns
4.0 — — 4.0
—
Hold time t_h
1.0 — — 1.0
—
ns
0.5 — — 0.5
—
0.5 — — 0.5
—
Pulse
t_w
width
5.0 — — 6.0
—
ns
4.0 — — 4.0
—
FROM
(Input)
TO
(Output)
SH/LD
Q_H or Q_H
CLK
H
CLK INH before CLK ↑
data before SH/LD ↑
SH/LD high before CLK ↑
SER before CLK ↑
PAR data after SH/LD ↑
SER data after CLK ↑
SH/LD high atfer CLK ↑
SH/LD low
CLK H or L
9