HD74LV165A Datasheet, PDF (2/17 Pages) Hitachi Semiconductor – Parallel-Load 8-bit Shift Register

HD74LV165A
Function Table
Inputs
Internal Outputs
SH/LD
CLK INH CLK
SER
A ... H
QA
QB
L
X
X
X
a ... h
a
b
H
L
↑
H
X
H
Q_An
H
L
↑
L
X
L
Q_An
H
H
X
X
X
Q_A0
Q_B0
H
X
H
X
X
Q_A0
Q_B0
H
↑
L
H
X
H
Q_An
H
↑
L
L
X
L
Q_An
Note: H: High level
L: Low level
↑: Low to high transition
X: Immaterial
a ... h: Parallel data
Q_A0 ... Q_H0: Outputs remain unchanged.
Q_An ... Q_Gn: Data shifted from the previous stage on a positive edge at the clock input.
Output
QH
h
Q_Gn
Q_Gn
Q_H0
Q_H0
Q_Gn
Q_Gn
Pin Arrangement
SH/LD 1
CLK 2
E3
F4
G5
H6
Q_H 7
GND 8
(Top view)
16 V_CC
15 CLK INH
14 D
13 C
12 B
11 A
10 SER
9 Q_H
2