HD74LV165A Datasheet, PDF (7/17 Pages) Hitachi Semiconductor – Parallel-Load 8-bit Shift Register

HD74LV165A
Switching Characteristics
• V_CC = 2.5 ± 0.2 V
Ta = 25°C
Item
Symbol Min
Maximum fmax
50
clock
frequency
40
Propa-
gation
t_PLH/t_PHL —
delay time
—
—
—
—
—
Setup time t_su
7.0
11.5
7.0
8.5
Hold time t_h
0.0
–1.0
0.0
Pulse
t_w
11.0
width
8.5
Typ Max
80 —
65 —
13.1 21.5
16.1 25.1
12.2 19.8
15.3 23.3
12.9 21.7
15.9 25.3
——
——
——
——
——
——
——
——
——
Ta = –40 to 85°C
Min
Max
45
—
35
—
1.0
23.5
1.0
28.0
1.0
22.0
1.0
26.0
1.0
24.0
1.0
28.0
7.0
—
12.0 —
8.5
—
9.5
—
0.5
—
0.0
—
0.0
—
13.0 —
9.0
—
Unit
MHz
Test
Conditions
C_L = 15 pF
C_L = 50 pF
ns
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
ns
ns
ns
ns
FROM
(Input)
TO
(Output)
SH/LD
Q_H or Q_H
CLK
H
CLK INH before CLK ↑
data before SH/LD ↑
SH/LD high before CLK ↑
SER before CLK ↑
PAR data after SH/LD ↑
SER data after CLK ↑
SH/LD high atfer CLK ↑
SH/LD low
CLK H or L
7