BB305C Datasheet, PDF (8/12 Pages) Hitachi Semiconductor – Build in Biasing Circuit MOS FET IC UHF/VHF RF Amplifier

BB305C
Noise Figure vs. Drain Current
4
V _DS = 5 V
V _G1= 5 V
3
V _G2S = 4 V
R_G= variable
f = 200 MHz
2
1
0
5 10 15 20 25 30
Drain Current I_D (mA)
Drain Current vs. Gate Resistance
30
25
20
15
10
V _DS = 5 V
5 _{V G1= 5 V}
V _G2S = 4 V
0
10 20 50
100 200
500 1000
Gate Resistance R G (k Ω)
Gain Reduction vs.
Gate2 to Source Voltage
60
V _DS = 5 V
50
V _G1= 5 V
V _G2S = 4 V
R_G= 82 k Ω
40
f = 200 MHz
30
20
10
0
1
2
3
4
5
Gate2 to Source Voltage V_G2S (V)
Input Capacitance vs.
Gate2 to Source Voltage
6
5
4
3
2
V _DS = 5 V
1
V _G1= 5 V
R_G= 82 k Ω
f = 1 MHz
0
0
1
2
3
4
5
Gate2 to Source Voltage V_G2S (V)
8