2SK1572 Datasheet, PDF (7/9 Pages) Hitachi Semiconductor – Silicon N-Channel MOS FET

Reverse Drain Current vs.
Source to Drain Voltage
5
Pulse Test
4
3
2
1
5, 10 V
V_GS = 0, –5 V
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
2SK1572
Normalized Transient Thermal Impedance vs. Pulse Width
3
D=1
1.0
0.5
T_C = 25°C
0.3 0.2
0.1
0.1
0.05
0.02
0.03
1
0.01
Shot
Pulse
0.01
10 µ
100 µ
θch–c (t) = γ_S (t) · θch–c
θch–c = 5.0°C/W, T_C = 25°C
P_DM
PW
T
D
=
PW
T
1m
10 m
100 m
1
10
Pulse Width PW (s)
Switching Time Test Circuit
Vin Monitor
Vout Monitor
D.U.T
R_L
Vin
10 V
50 Ω
V=.._{D3D0 V}
Waveforms
90%
Vin
Vout
10%
10%
t_{d (on)}
90%
t_r
90%
t_{d (off)}
10%
t_f
7