HD4074344 Datasheet, PDF (57/100 Pages) Hitachi Semiconductor – 4-bit microcomputers

HD404344R Series/HD404394 Series
• Watchdog timer operation: Timer C can be used as a watchdog timer for programs that may run out of
control. A watchdog timer is enabled when the setting on the watchdog on flag (WDON: $020, bit 1) is
1. When timer C overflows, an MCU reset occurs. This usually controls programs running out of
control by initializing timer C through software before timer C counts up to $FF (figure 34).
$FF + 1
Timer C
count value
Overflow
$00
Time
CPU
operation
Normal Timer C Normal Timer C
operation clear operation clear
Program
runaway
Reset
Normal
operation
Figure 34 Watchdog Timer Operation Flowchart
• Timer output operation: Timer C can select the timer output mode by selecting the TOC pin after setting
bit 2 (PMRA2) of port mode register A (PMRA: $004) to 1. The output of the TOC pin is initialized to
0 by an MCU reset. PWM output is a pulse output function of variable duty. The output wave differs by
the contents of timer mode register C and timer write register C, as shown in figure 35.
T × (N + 1)
TMC3 = 0
(free-running
timer)
TMC3 = 1
(reload timer)
T × 256
T
T × (256 – N)
Notes: T: Input clock period supplied to counter. (The clock input source and system clock division ratio
are determined by timer mode register C.)
N: Value in timer write register C. (When N = 255 ($FF), PWM output is fixed low.)
Figure 35 PWM Output Waveform
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