HN58S65A Datasheet, PDF (5/18 Pages) Hitachi Semiconductor – 64 k EEPROM (8-kword x 8-bit) Ready/Busy function

Capacitance (Ta = 25˚C, f = 1 MHz)
Parameter
Symbol
Min
Typ
Max
Input capacitance
Cin*¹
—
—
6
Output capacitance
Cout*¹
—
—
12
Note: 1. This parameter is sampled and not 100% tested.
HN58S65A Series
Unit
Test conditions
pF
Vin = 0 V
pF
Vout = 0 V
AC Characteristics (Ta = 0 to + 70˚C, V_CC = 2.2 to 3.6 V)
Test Conditions
• Input pulse levels : 0.4 V to 2.4 V (V_CC = 2.7 to 3.6 V), 0.4 V to 1.9 V (V_CC = 2.2 to 2.7 V)
• Input rise and fall time : ≤ 5 ns
• Input timing reference levels : 0.8, 1.8 V
• Output load : 1TTL Gate +100 pF
• Output reference levels : 1.5 V, 1.5 V (V_CC = 2.7 to 3.6 V)
1.1 V, 1.1 V (V_CC = 2.2 to 2.7 V)
Read Cycle
HN58S65A
-15
Parameter
Symbol Min
Max
Address to output delay
t _ACC
—
150
CE to output delay
t _CE
—
150
OE to output delay
t _OE
10
80
Address to output hold
t _OH
0
—
OE (CE) high to output float*¹ t_DF
0
80
Unit
ns
ns
ns
ns
ns
Test conditions
CE = OE = V_IL, WE = V_IH
OE = V_IL, WE = V_IH
CE = V_IL, WE = V_IH
CE = OE = V_IL, WE = V_IH
CE = V_IL, WE = V_IH