HN58S65A Datasheet, PDF (3/18 Pages) Hitachi Semiconductor – 64 k EEPROM (8-kword x 8-bit) Ready/Busy function

Block Diagram
V_CC
V_SS
OE
CE
WE
A0
to
A5
A6
to
A12
High voltage generator
Control logic and timing
Address
buffer and
latch
Y decoder
X decoder
Operation Table
Operation
CE
OE
WE
Read
V_IL
V_IL
V_IH
Standby
V_IH
×*¹
×
Write
V_IL
V_IH
V_IL
Deselect
V_IL
V_IH
V_IH
Write Inhibit
×
×
V_IH
×
V_IL
×
Data Polling
V_IL
V_IL
V_IH
Notes: 1. × : Don’t care
HN58S65A Series
I/O0 to I/O7
RDY/Busy
I/O buffer
and
input latch
Y gating
Memory array
Data latch
RDY/Busy
High-Z
High-Z
High-Z to V_OL
High-Z
—
—
V_OL
I/O
Dout
High-Z
Din
High-Z
—
—
Dout (I/O7)