HD66523 Datasheet, PDF (5/19 Pages) Hitachi Semiconductor – (240-Channel Common Driver with Internal LCD Timing Circuit)

HD66523
Internal Block Diagram
VRH1
VM1
VRL1
VRH–VRL
V_CC–GND
X1 to X240
LCD driver
240
Decoder
240
Level shifter
240
Selector
LCD timing
generator
Level
shifter
VRH2
VM2
VRL2
Scanning function
generator
Oscillator
I/O control
CR R C RESET BLANK CL1 FLM DOC DISPOFF FX0 FX1 _{TEST1 TEST0} M/S DUTY BP4~0 SHL
1. CR Oscillator: The CR oscillator generates the HD66523 operation clock. During master mode, since
the operation clock is needed, connect oscillation resistor R_f with oscillation capacitor C_f. When the
external clock is used. Input external clock to pin CR and open pins C and R (Figure 1).
When using the HD66523 during slave mode, the operation clock will not be needed; therefore,
connect pin CR to V_CC and open pins C and R (Figure 2).
2. Liquid Crystal Timing Generator: The liquid crystal timing generator creates various signals for the
LCD. During master mode (M/6 = V_CC), the generator operates the HD66523’s internal circuitry as a
common internal driver using the generated LCD signals. In addition, signals CL1, FLM and '2&
created by this generator can synchronously display data on a liquid crystal display by inputting them
into the RAM-provided segment driver HD66522 used together with HD66523. During slave mode
(M/6 = GND), this generator stops; the slave HD66523 operates based on signals CL1, '2& and FLM
generated by the master HD66523.
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