HD66523 Datasheet, PDF (17/19 Pages) Hitachi Semiconductor – (240-Channel Common Driver with Internal LCD Timing Circuit)

HD66523
Electrical Characteristics
DC Characteristics (V_CC = 2.4 to 3.6V, GND = 0V, VLCD = 18 to 23V, V_EE = –12 to –17V, Ta = –20
to +75°C)
Item
Applicable
Symbol Pins
min.
typ. max.
Measurement
Unit Condition
Note
s
Input high level V_IH1
0.8 × V_CC —
V_CC
V
1
voltage
Input low level V_IL1
0
— 0.2 × V_CC V
1
voltage
Output high level V_OH
voltage
0.9 × V_CC — —
V
I_OH = –50 µA
2
Output low level V_OL
voltage
—
— 0.1 × V_CC V
I_OL = 50 µA
2
Input leakage I_IL1
current (1)
–2.5
— 2.5
µA VIN = V_CC to GND 1
Input leakage I_IL2
current (2)
VRH1, VRH2, –25
VM1, VM2
VRL1, VRL2
— 25
µA VIN = VLCD to V_EE 1
Vi-Vj ON
R_ON
X1 to X240 —
1.0 2.0
kΩ I_ON = 100µA
3
resistance
Current
I_MS
consumption (1)
—
— T.B.D. µA Master mode
4
1/240 duty cycle,
C_f = 100pF
R_f = 180kΩ
V_CC = 3.0V
Current
I_SL
consumption (2)
—
— T.B.D. µA Slave mode
4
1/240 duty cycle,
f_CL = 16.8 kHz,
V_CC = 3.0V
Current
I_LCD
consumption (3)
—
— T.B.D. µA Master mode
4
1/240 duty cycle,
C_f = 100pF
R_f = 180kΩ
V_CC = 3.0V
VLCD = 23V
V_EE = –17V
Notes: 1. Applied to input pins M/6, DUTY, BP4 to BP0, ',632)), SHL, 5(6(7, TEST1, TEST0 and
CR, and I/O pins, '2&, CL1 and FLM during input state.
2. Applied to output pins, FX1 and FX0, and I/O pins, '2&, CL1 and FLM, during output stagte.
3 Indicates the resistance between on pin from X1 to X240 and another pin from the V pins,
VRH1/VRH2, VM1/VM2 and VRL1/VRL2, when load current is applied to the X pin; defined
under the following conditions:
VRH = +23V, VRL = –17V
VM = 1/2 * (VRH–VRL)
4. Input and Output currents are excluded. When a CMOS input is floating, excess current flows
from the power supply to the input circuit. To avoid this, ViH and ViL must be held to V_CC and
GND levels, respectively.
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