HB289048C4 Datasheet, PDF (5/66 Pages) Hitachi Semiconductor – CompactFlash™

HB289048C4/289032C4/289016C4/289008C4
Card Pin Explanation
Signal name
Direction Pin No.
Description
A10 to A0
I
(PC Card Memory mode)
8, 10, 11, 12, 14, Address bus is A10 to A0. A10 is MSB and A0 is
15, 16, 17, 18, LSB.
19, 20
A10 to A0
(PC Card I/O mode)
A2 to A0
(True IDE mode)
18, 19, 20
Address bus is A10 to A0. Only A2 to A0 are used,
the remaining address lines should be grounded by
the host.
BVD1
I/O
46
(PC Card Memory mode)
BVD1 outputs the battery voltage status in the card.
This output line is constantly driven to a high state
since a battery is not required for this product.
-STSCHG
(PC Card I/O mode)
-STSCHG is used for changing the status of
Configuration and status register in attribute area.
-PDIAG
(True IDE mode)
-PDIAG is the Pass Diagnostic signal in Master/Slave
handshake protocol.
BVD2
I/O
45
(PC Card Memory mode)
BVD2 outputs the battery voltage status in the card.
This output line is constantly driven to a high state
since a battery is not required for this product.
-SPKR
(PC Card I/O mode)
-SPKR outputs speaker signals. This output line is
constantly driven to a high state since this product
does not support the audio function.
-DASP
(True IDE mode)
-DASP is the Disk Active/Slave Present signal in the
Master/Slave handshake protocol.
-CD1, -CD2
O
(PC Card Memory mode)
26, 25
-CD1 and -CD2 are the card detection signals. -CD1
and -CD2 are connected to ground in this card, so
host can detect that the card is inserted or not.
-CD1, -CD2
(PC Card I/O mode)
-CD1, -CD2
(True IDE mode)
-CE1, -CE2
I
(PC Card Memory mode)
Card Enable
7, 32
-CE1 and -CE2 are low active card select signals.
Byte/Word/Odd byte mode are defined by combination
of -CE1, -CE2 and A0.
-CE1, -CE2
(PC Card I/O mode)
Card Enable
-CE1, -CE2
(True IDE mode)
-CE2 is used for select the Alternate Status Register
and the Device Control Register while -CE1 is the chip
select for the other task file registers.
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