HB289048C4 Datasheet, PDF (41/66 Pages) Hitachi Semiconductor – CompactFlash™

HB289048C4/289032C4/289016C4/289008C4
12. Device control register: This register is write only register, and it is used for controlling the card
interrupt request and issuing an ATA soft reset to the card.
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
×
×
×
×
1
SRST
nIEN
0
bit Name
7 to 4 ×
31
2 SRST (Software ReSeT)
1 nIEN (Interrupt ENable)
00
Function
don't care
This bit is set to "1".
This bit is set to "1" in order to force the card to perform Task File
Reset operation. This does not change the Card Configuration
registers as a Hardware Reset does. The card remains in Reset
until this bit is reset to "0".
This bit is used for enabling -IREQ. When this bit is set to "0", -IREQ
is enabled. When this bit is set to "1", -IREQ is disabled.
This bit is set to "0".
13. Drive Address register: This register is read only register, and it is used for confirming the drive status.
This register is provides for compatibility with the AT disk drive interface. It is recommended that this
register is not mapped into the host’s I/O space because of potential conflicts on bit7.
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
×
nWTG
nHS3
nHS2
nHS1
nHS0
nDS1
nDS0
bit Name
7
×
6 nWTG (WriTing Gate)
5 to 2 nHS3-0 (Head Select3-0)
1 nDS1 (Idrive Select1)
0 nDS0 (Idrive Select0)
Function
This bit is unknown.
This bit is unknown.
These bits is the negative value of Head Select bits (bit 3 to 0) in
Drive/Head register.
This bit is unknown.
This bit is unknown.
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