HB289048C4 Datasheet, PDF (13/66 Pages) Hitachi Semiconductor – CompactFlash™

HB289048C4/289032C4/289016C4/289008C4
2. Task File register access specifications
There are two cases of Task File register mapping, one is mapped I/O address area, the other is mapped Memory address
area. Each case of Task File register read and write operations are executed under the condition as follows. That area can
be accessed by Byte/Word/Odd Byte mode which are defined by PC card standard specifications.
(1) I/O address map
Task File Register Read Access Mode (1)
Mode
-REG -CE2 -CE1 A0
Standby mode
×
H
H
×
Byte access (8-bit)
L
H
L
L
L
H
L
H
Word access (16-bit) L
L
L
×
Odd byte access (8-bit) L
L
H
×
Note: ×: L or H
-IORD -IOWR -OE -WE D8 to D15 D0 to D7
×
×
×
×
High-Z High-Z
L
H
H
H
High-Z even byte
L
H
H
H
High-Z odd byte
L
H
H
H
odd byte even byte
L
H
H
H
odd byte High-Z
Task File Register Write Access Mode (1)
Mode
-REG -CE2 -CE1 A0
Standby mode
×
H
H
×
Byte access (8-bit)
L
H
L
L
L
H
L
H
Word access (16-bit) L
L
L
×
Odd byte access (8-bit) L
L
H
×
Note: ×: L or H
-IORD -IOWR -OE -WE D8 to D15 D0 to D7
×
×
×
×
Don’t care Don’t care
H
L
H
H
Don’t care even byte
H
L
H
H
Don’t care odd byte
H
L
H
H
odd byte even byte
H
L
H
H
odd byte Don’t care
Task File Register Access Timing Example (1)
A0 to A10
-REG
-CE2/-CE1
-IORD
- IOWR
D0 to D15
Dout
read cycle
Din
write cycle
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