R1LP0408C Datasheet, PDF (4/14 Pages) Hitachi Semiconductor – Wide Temperature Range Version 4 M SRAM (512-kword × 8-bit)

R1LP0408C-I Series
Block Diagram
LSB
A11
A9
A8
A15
A18
A10
A13
A17
A16
A14
A12
MSB
I/O0
I/O7
CS#
WE#
OE#
•
•
•
Row
•
Decoder ^•
Memory Matrix
2,048 × 2,048
V _CC
V _SS
••
Column I/O
•
•
Input
Data
Control
Column Decoder
LSB _{A3 A2A1A0 A4 A5A6 A7} MSB
••
Timing Pulse Generator
Read/Write Control
Rev.1.00, Aug.01.2003, page 4 of 13