HN58V65A Datasheet, PDF (20/27 Pages) Hitachi Semiconductor – 64 k EEPROM (8-kword x 8-bit) Ready/Busy function, RES function (HN58V66A)

HN58V65A Series, HN58V66A Series
WE, CE Pin Operation
During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the
rising edge of WE or CE.
Write/Erase Endurance and Data Retention Time
The endurance is 10⁵ cycles in case of the page programming and 10⁴ cycles in case of the byte
programming (1% cumulative failure rate). The data retention time is more than 10 years when a device
is page-programmed less than 10⁴ cycles.
Data Protection
1. Data Protection against Noise on Control Pins (CE, OE, WE) during Operation
During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to
programming mode by mistake.
To prevent this phenomenon, this device has a noise cancellation function that cuts noise if its width is
15 ns or less.
Be careful not to allow noise of a width of more than 15 ns on the control pins.
WE
CE
V_IH
0V
V_IH
OE
0V
15 ns max