HN58V65A Datasheet, PDF (19/27 Pages) Hitachi Semiconductor – 64 k EEPROM (8-kword x 8-bit) Ready/Busy function, RES function (HN58V66A)

HN58V65A Series, HN58V66A Series
Functional Description
Automatic Page Write
Page-mode write feature allows 1 to 64 bytes of data to be written into the EEPROM in a single write
cycle. Following the initial byte cycle, an additional 1 to 63 bytes can be written in the same manner.
Each additional byte load cycle must be started within 30 µs from the preceding falling edge of WE or
CE. When CE or W E is kept high for 100 µs after data input, the EEPROM enters write mode
automatically and the input data are written into the EEPROM.
Data Polling
Data polling indicates the status that the EEPROM is in a write cycle or not. If EEPROM is set to read
mode during a write cycle, an inversion of the last byte of data outputs from I/O7 to indicate that the
EEPROM is performing a write operation.
RDY/Busy Signal
RDY/Busy signal also allows status of the EEPROM to be determined. The RDY/Busy signal has high
impedance except in write cycle and is lowered to V_OL after the first write signal. At the end of a write
cycle, the RDY/Busy signal changes state to high impedance.
RES Signal (only the HN58V66A series)
When RES is low, the EEPROM cannot be read or programmed. Therefore, data can be protected by
keeping RES low when V_CC is switched. RES should be high during read and programming because it
doesn’t provide a latch function.
V_CC
RES
Read inhibit
Read inhibit
Program inhibit
Program inhibit