S11106-10_15 Datasheet, PDF (7/12 Pages) Hamamatsu Corporation – CMOS linear image sensors

CMOS linear image sensors
S11106-10, S11107-10
Operation example
S11106-10
When the clock pulse frequency is maximized (video data rate is also maximized), the time of one scan is minimized, and the integra-
tion time is maximized (for outputting signals from all 128 channels)
Clock pulse frequency = Video data rate = 10 MHz
Start pulse cycle = 148/f(CLK) = 148/10 MHz = 14.8 μs
High period of start pulse = Start pulse cycle - Start pulse’s low period min.
= 148/f(CLK) - 32/f(CLK) = 148/10 MHz - 32/10 MHz = 11.6 μs
Integration time is equal to the high period of start pulse + 14 cycles of clock pulses - 100 ns, so it will be 11.6 + 1.4 - 0.1 = 12.9 μs.
tlp(ST)=3.2 μs
thp(ST)=11.6 μs
ST
tpi(ST)=14.8 μs
KMPDC0388EB
S11107-10
When the clock pulse frequency is maximized (video data rate is also maximized), the time of one scan is minimized, and the integra-
tion time is maximized (for outputting signals from all 64 channels)
Clock pulse frequency = Video data rate = 10 MHz
Start pulse cycle = 84/f(CLK) = 84/10 MHz = 8.4 μs
High period of start pulse = Start pulse cycle - Start pulse’s low period min.
= 84/f(CLK) - 32/f(CLK) = 84/10 MHz - 32/10 MHz = 5.2 μs
Integration time is equal to the high period of start pulse + 14 cycles of clock pulses - 100 ns, so it will be 5.2 + 1.4 - 0.1 = 6.5 μs.
tlp(ST)=3.2 μs
thp(ST)=5.2 μs
ST
tpi(ST)=8.4 μs
KMPDC0389EB
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