GS8182Q18BD-300M Datasheet, PDF (22/35 Pages) GSI Technology – 18Mb SigmaQuad-IITM Burst of 2 SRAM

AC Electrical Characteristics
Parameter
Clock
K, K Clock Cycle Time
C, C Clock Cycle Time
tTKC Variable
K, K Clock High Pulse Width
C, C Clock High Pulse Width
K, K Clock Low Pulse Width
C, C Clock Low Pulse Width
K to K High
C to C High
K to K High
C to C High
K, K Clock High to C, C Clock High
DLL Lock Time
K Static to DLL reset
Output Times
K, K Clock High to Data Output Valid
C, C Clock High to Data Output Valid
K, K Clock High to Data Output Hold
C, C Clock High to Data Output Hold
K, K Clock High to Echo Clock Valid
C, C Clock High to Echo Clock Valid
K, K Clock High to Echo Clock Hold
C, C Clock High to Echo Clock Hold
CQ, CQ High Output Valid
CQ, CQ High Output Hold
CQ Phase Distortion
K Clock High to Data Output High-Z
C Clock High to Data Output High-Z
K Clock High to Data Output Low-Z
C Clock High to Data Output Low-Z
Setup Times
Address Input Setup Time
Control Input Setup Time (RW, LD)
Control Input Setup Time (BWX, NWX)
Data Input Setup Time
Symbol
t_KHKH
t_CHCH
t_KCVar
t_KHKL
t_CHCL
t_KLKH
t_CLCH
t_KHKH
t_CHCH
t_KHKH
t_CHCH
t_KHCH
t_KCLock
t_KCReset
t_KHQV
t_CHQV
t_KHQX
t_CHQX
t_KHCQV
t_CHCQV
t_KHCQX
t_CHCQX
t_CQHQV
t_CQHQX
t_CQHCQH
t_CQHCQH
t_KHQZ
t_CHQZ
t_KHQX1
t_CHQX1
t_AVKH
t_IVKH
t_IVKH
t_DVKH
GS8182Q08/09/18/36BD-300M
-300M
Min
Max
3.3
8.4
—
0.2
1.32
—
1.32
—
1.49
—
1.49
—
0
1.45
1024
—
30
—
—
0.45
–0.45
—
—
0.45
–0.45
—
—
0.27
–0.27
—
1.24
—
—
0.45
–0.45
—
0.3
—
0.3
—
0.3
—
0.3
—
ns
ns
6
ns
ns
ns
ns
ns
cycle
6
ns
ns
4
ns
4
ns
ns
ns
8
ns
8
ns
ns
4
ns
4
ns
1
ns
2
ns
3
ns
Rev: 1.00a 11/2011
22/35
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology