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| GS8182Q18BD-300M Datasheet, PDF (19/35 Pages) GSI Technology – 18Mb SigmaQuad-IITM Burst of 2 SRAM | |||
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GS8182Q08/09/18/36BD-300M
Undershoot Measurement and Timing
Overshoot Measurement and Timing
VIH
20% tKHKH
VDD + 1.0 V
VSS
50%
50%
VDD
VSS â 1.0 V
20% tKHKH
VIL
Note:
Input Undershoot/Overshoot voltage must be â2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
Capacitance
(TA = 25oC, f = 1 MHZ, VDD = 1.8 V)
Parameter
Input Capacitance
Output Capacitance
Clock Capacitance
Note:
This parameter is sample tested.
Symbol
CIN
COUT
CCLK
Test conditions
VIN = 0 V
VOUT = 0 V
VIN = 0 V
Typ.
Max.
Unit
4
5
pF
6
7
pF
5
6
pF
AC Test Conditions
Parameter
Input high level
Input low level
Max. input slew rate
Input reference level
Output reference level
Note:
Test conditions as specified with output loading as shown unless otherwise noted.
Conditions
1.25 V
0.25 V
2 V/ns
0.75 V
VDDQ/2
AC Test Load Diagram
DQ
RQ = 250 Ω (HSTL I/O)
50Ω
VREF = 0.75 V
VT = VDDQ/2
Rev: 1.00a 11/2011
19/35
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology
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