GS74117AX Datasheet, PDF (2/12 Pages) GSI Technology – 256K x 16 4Mb Asynchronous SRAM

Block Diagram
A0
Row
Decoder
Address
Input
Buffer
Memory Array
A17
CE
WE
OE
Control
UB ^_____
LB ^_____
Column
Decoder
I/O Buffer
DQ1 DQ16
Truth Table
CE
OE
WE
LB
UB
H
X
X
X
X
L
L
L
L
H
L
H
H
L
L
L
L
X
L
L
H
H
L
L
H
H
X
X
L
X
X
H
H
Note: X: “H” or “L”
DQ1 to DQ8
Not Selected
Read
Read
High Z
Write
Write
Not Write, High Z
High Z
High Z
DQ9 to DQ16
Not Selected
Read
High Z
Read
Write
Not Write, High Z
Write
High Z
High Z
GS74117AX
VDD Current
ISB1, ISB2
IDD
Rev: 1.02 10/2002
2/12
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.