GS8162Z72C Datasheet, PDF (17/31 Pages) GSI Technology – 18Mb Pipelined and Flow Through Synchronous NBT SRAM

GS8162Z72C
AC Electrical Characteristics
Parameter
Symbol
-200
-166
-150
-133
Unit
Min Max Min Max Min Max Min Max
Clock Cycle Time
tKC
5.0 — 6.0 — 6.7 — 7.5 — ns
Clock to Output Valid
tKQ
— 3.0 — 3.4 — 3.8 — 4.0 ns
Pipeline
Clock to Output Invalid
Clock to Output in Low-Z
tKQX
1.5 — 1.5 — 1.5 — 1.5 — ns
tLZ¹
1.5 — 1.5 — 1.5 — 1.5 — ns
Setup time
tS
1.4 — 1.5 — 1.5 — 1.5 — ns
Hold time
tH
0.4 — 0.5 — 0.5 — 0.5 — ns
Clock Cycle Time
tKC
6.5 — 7.0 — 7.5 — 8.5 — ns
Clock to Output Valid
tKQ
— 6.5 — 7.0 — 7.5 — 8.5 ns
Flow
Through
Clock to Output Invalid
Clock to Output in Low-Z
tKQX
3.0 — 3.0 — 3.0 — 3.0 — ns
tLZ¹
3.0 — 3.0 — 3.0 — 3.0 — ns
Setup time
tS
1.5 — 1.5 — 1.5 — 1.5 — ns
Hold time
tH
0.5 — 0.5 — 0.5 — 0.5 — ns
Clock HIGH Time
tKH
1.3 — 1.3 — 1.5 — 1.7 — ns
Clock LOW Time
tKL
1.5 — 1.5 — 1.7 — 2 — ns
Clock to Output in
High-Z
tHZ¹
1.5 3.0 1.5 3.0 1.5 3.0 1.5 3.0 ns
G to Output Valid
tOE
— 3.2 — 3.5 — 3.8 — 4.0 ns
G to output in Low-Z
tOLZ¹
0
—
0
— 0 — 0 — ns
G to output in High-Z
tOHZ¹
— 3.0 — 3.0 — 3.0 — 3.0 ns
ZZ setup time
tZZS²
5
—
5
— 5 — 5 — ns
ZZ hold time
tZZH²
1
—
1
— 1 — 1 — ns
ZZ recovery
tZZR
20 — 20 — 20 — 20 — ns
Notes:
1. These parameters are sampled and are not 100% tested.
2. ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
Rev: 2.22 11/2005
17/31
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, GSI Technology