GS816218BB-V Datasheet, PDF (16/31 Pages) GSI Technology – 1M x 18, 512K x 36 18MbS/DCD Sync Burst SRAMs

Pipeline Mode Timing (SCD)
Preliminary
GS8162xxBB-xxxV
Begin
Read A Cont
Single Read
Cont
CK
Deselect Write B
Single Write
tKL
tKH
tKC
Read C
Read C+1 Read C+2 Read C+3 Cont
Burst Read
Deselect
ADSP
ADSC
ADV
A0–An
GW
BW
Ba–Bd
E1
E2
E3
tS
tH
tS
tS
tH
A
tS
tS
tS
tS
tH
tS
tH
ADSC initiated read
tH
B
C
tH
tH
tS
tH
E1 masks ADSP
E2 and E3 only sampled with ADSP and ADSC
Deselected with E1
G
DQa–DQd
tOE
tOHZ
Q(A)
tS
tH
D(B)
tKQ
tLZ
Q(C)
Q(C+1)
Q(C+2)
tKQX
tHZ
Q(C+3)
Rev: 1.01a 6/2006
16/31
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2004, GSI Technology