GS816036DGT-250IV Datasheet, PDF (16/23 Pages) GSI Technology – 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs

GS816018/32/36DGT-xxxV
AC Electrical Characteristics
Parameter
Symbol
-333
Min Max
-250
Min Max
-200
-150
Unit
Min Max Min Max
Clock Cycle Time
tKC
3.0 — 4.0 — 5.0 — 6.7 — ns
Clock to Output Valid
tKQ
— 3.0 — 3.0 — 3.0 — 3.8 ns
Pipeline
Clock to Output Invalid
Clock to Output in Low-Z
tKQX
tLZ¹
1.5 — 1.5 — 1.5 — 1.5 — ns
1.5 — 1.5 — 1.5 — 1.5 — ns
Setup time
tS
1.0 — 1.2 — 1.4 — 1.5 — ns
Hold time
tH
0.1 — 0.2 — 0.4 — 0.5 — ns
Clock Cycle Time
tKC
5.0 — 5.5 — 6.5 — 7.5 — ns
Clock to Output Valid
tKQ
— 5.0 — 5.5 — 6.5 — 7.5 ns
Flow
Through
Clock to Output Invalid
Clock to Output in Low-Z
tKQX
tLZ¹
2.0 — 2.0 — 2.0 — 2.0 — ns
2.0 — 2.0 — 2.0 — 2.0 — ns
Setup time
tS
1.3 — 1.5 — 1.5 — 1.5 — ns
Hold time
tH
0.3 — 0.5 — 0.5 — 0.5 — ns
Clock HIGH Time
tKH
1.0 — 1.3 — 1.3 — 1.5 — ns
Clock LOW Time
tKL
1.2 — 1.5 — 1.5 — 1.7 — ns
Clock to Output in
High-Z
tHZ¹
1.5 3.0 1.5 3.0 1.5 3.0 1.5 3.8 ns
G to Output Valid
tOE
— 3.0 — 3.0 — 3.0 — 3.8 ns
G to output in Low-Z
tOLZ¹
0
—
0
—
0
—
0
— ns
G to output in High-Z
tOHZ¹
— 3.0 — 3.0 — 3.0 — 3.8 ns
ZZ setup time
tZZS²
5
—
5
—
5
—
5
— ns
ZZ hold time
tZZH²
1
—
1
—
1
—
1
— ns
ZZ recovery
tZZR
20
—
20
—
20
—
20
—
ns
Notes:
1. These parameters are sampled and are not 100% tested.
2. ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
Rev: 1.03a 9/2013
16/22
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology