GS8182T19 Datasheet, PDF (14/27 Pages) GSI Technology – 18Mb SigmaDDR-II+TM Burst of 2 SRAM

GS8182T19/37BD-435/400/375/333/300
AC Electrical Characteristics
Parameter
Symbol
Clock
K, K Clock Cycle Time
tKC Variable
K, K Clock High Pulse Width
K, K Clock Low Pulse Width
K to K High
K to K High
DLL Lock Time
K Static to DLL reset
Output Times
K, K Clock High to Data Output Valid
K, K Clock High to Data Output Hold
K, K Clock High to Echo Clock Valid
K, K Clock High to Echo Clock Hold
CQ, CQ High Output Valid
CQ, CQ High Output Hold
CQ, CQ High to QLVD
CQ Phase Distortion
K Clock High to Data Output High-Z
K Clock High to Data Output Low-Z
Setup Times
Address Input Setup Time
Control Input Setup Time
(R, W)
Control Input Setup Time
(BWX) (NWX)
Data Input Setup Time
t_KHKH
t_KVar
t_KHKL
t_KLKH
t_KHKH
t_KHKH
t_KLock
t_KReset
t_KHQV
t_KHQX
t_KHCQV
t_KHCQX
t_CQHQV
t_CQHQX
t_QVLD
t_CQHCQH
t_KHQZ
t_KHQX1
t_AVKH
t_IVKH
t_IVKH
t_DVKH
-435
Min Max
2.3
8.4
—
0.2
0.4
—
0.4
—
1.00
—
1.00
—
2048
—
30
—
—
0.45
–0.45
—
—
0.45
–0.45
—
—
0.2
–0.2
—
-0.2
0.8
—
—
0.45
–0.45
—
0.4
—
0.4
—
0.28
—
0.28
—
-400
Min Max
2.5
8.4
—
0.2
0.4
—
0.4
—
1.06
—
1.06
—
2048
—
30
—
—
0.45
–0.45
—
—
0.45
–0.45
—
—
0.2
–0.2
—
-0.2
0.86
—
—
0.45
–0.45
—
0.4
—
0.4
—
0.28
—
0.28
—
-375
Min Max
-333
Min Max
-300
Min Max
2.67 8.4
3.0
8.4
3.3
8.4 ns
—
0.2
—
0.2
—
0.2 ns 4
0.4
—
0.4
—
0.4
—
ns
0.4
—
0.4
—
0.4
—
ns
1.13
—
1.28
—
1.4
—
ns
1.13
—
1.28
—
1.4
—
ns
2048 — 2048 — 2048 — cycle 6
30
—
30
—
30
—
ns
—
0.45
—
0.45
—
0.45 ns
–0.45 — –0.45 — –0.45 —
ns
—
0.45
—
0.45
—
0.45 ns
–0.45 — –0.45 — –0.45 —
ns
—
0.2
—
0.2
—
0.2
–0.2
—
–0.2
—
–0.2
—
-0.2
-0.2
-0.2
0.88
—
1.03
—
1.15
—
—
0.45
—
0.45
—
0.45
–0.45 — –0.45 — –0.45 —
ns 7
ns 7
ns
ns 5
ns 5
0.4
—
0.4
—
0.4
—
ns 1
0.4
—
0.4
—
0.4
—
ns 2
0.28
—
0.28
—
0.28
—
ns 3
0.28
—
0.28
—
0.28
—
ns
Rev: 1.03a 11/2011
14/27
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2008, GSI Technology