GS8182T19 Datasheet, PDF (11/27 Pages) GSI Technology – 18Mb SigmaDDR-II+TM Burst of 2 SRAM

GS8182T19/37BD-435/400/375/333/300
Capacitance
(T_A = 25^oC, f = 1 MHZ, V_DD = 3.3 V)
Parameter
Input Capacitance
Output Capacitance
Clock Capacitance
Note:
This parameter is sample tested.
Symbol
C_IN
C_OUT
C_CLK
Test conditions
V_IN = 0 V
V_OUT = 0 V
—
Typ.
Max.
Unit
4
5
pF
6
7
pF
5
6
pF
AC Test Conditions
Parameter
Input high level
Input low level
Max. input slew rate
Input reference level
Output reference level
Note:
Test conditions as specified with output loading as shown unless otherwise noted.
Conditions
V_DDQ
0V
2 V/ns
V_DDQ/2
V_DDQ/2
AC Test Load Diagram
DQ
RQ = 250 Ω (HSTL I/O)
50Ω
V_REF = 0.75 V
VT = V_DDQ/2
Input and Output Leakage Characteristics
Parameter
Input Leakage Current
(except mode pins)
Symbol
I_IL
Doff
I_INDOFF
Output Leakage Current
I_OL
Test Conditions
V_IN = 0 to V_DD
V_DD ≥ V_IN ≥ V_IL
0 V ≤ V_IN ≤ V_IL
Output Disable,
V_OUT = 0 to V_DDQ
Min.
Max
–2 uA
2 uA
–100 uA
2 uA
–2 uA
2 uA
–2 uA
2 uA
Rev: 1.03a 11/2011
11/27
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2008, GSI Technology