GS8150V18AB Datasheet, PDF (10/25 Pages) GSI Technology – 1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM

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GS8150V18/36AB-357/333/300/250
Undershoot Measurement and Timing
V_IH
V_SS
50%
V_SS – 1.0 V
20% tKC
Capacitance
(T_A = 25^oC, f = 1 MHZ, V_DD = 1.8 V)
Parameter
Symbol
Input Capacitance
Output Capacitance
Output Capacitance (Clock)
Note:
This parameter is sample tested.
C_IN
C_OUT
C_IN(CK)
AC Test Conditions
Parameter
Input high level
Input low level
Input rise/fall time (10% to 90%)
Input reference level
Clock input reference level
Output reference level
Clock (V_DIF)
Clock (V_CM)
V_DDQ
RQ
Overshoot Measurement and Timing
V_DD + 1.0 V
50%
20% tKC
V_DD
V_IL
Test conditions
V_IN = 0 V
V_OUT = 0 V
V_IN = 0 V
Max. Unit
4
pF
5
pF
5
pF
Conditions
1.25 V
0.25 V
0.5 ns/0.5 ns
V_DDQ/2
Differential cross point
V_DDQ/2
0.75 V
0.75 V
1.5 V
250Ω
Rev: 1.04 4/2005
10/25
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology