GS2970A Datasheet, PDF (32/150 Pages) Gennum Corporation – Integrated audio clock generator

Table 4-2:PLL Loop Bandwidth
Input Data Rate
LB_CONT Pin Connection
SD
3.3V
Floating
0V
HD
3.3V
Floating
0V
3G
3.3V
Floating
0V
1_{Measured with 0.2UI input jitter applied}
Loop Bandwidth (MHz)¹
0.135
0.27
0.54
0.75
1.5
3.0
1.5
3.0
6.0
4.6 External Crystal/Reference Clock
The GS2970A requires an external 27MHz reference clock for correct operation. This
reference clock is generated by connecting a crystal to the XTAL1 and XTAL2 pins of the
device. See Application Reference Design on page 145. Table 4-3 shows XTAL
characteristics.
Alternately, a 27MHz external clock source can be connected to the XTAL1 pin of the
device, as shown in Figure 4-3.
The frequency variation of the crystal including aging, supply and temperature
variation, should be less than +/-100ppm.
The equivalent series resistance (or motional resistance) should be a maximum of 50Ω.
The external crystal is used in the frequency acquisition process. It has no impact on the
output jitter performance of the part when the part is locked to incoming data. Because
of this, the only key parameter is the frequency variation of the crystal that is stated
above.
GS2970A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54244 - 2
September 2012
32 of 150