GA05JT12-CAL_16 Datasheet, PDF (8/12 Pages) GeneSiC Semiconductor, Inc. – OFF Silicon Carbide Junction Transistor

Die Datasheet
GA05JT12-CAL
Figure 20: Typical steady state gate current supplied by the
GA03IDDJT30-FR4 board for the GA05JT12-CAL with the on
board resistance of 3.75 Ω
Figure 21: Maximum gate resistance for safe operation of
the GA05JT12-CAL at different drain currents using the
GA03IDDJT30-FR4 board.
B:2: High Speed, Low Loss Drive with Boost Inductor
A High Speed, Low-Loss Driver with Boost Inductor is also capable of driving the GA05JT12-CAL at high-speed. It utilizes a gate drive
inductor instead of a capacitor to provide the high-current gate current pulses IG,on and IG,off. During operation, inductor L is charged to a
specified IG,on current value then made to discharge IL into the SJT gate pin using logic control of S1, S2, S3, and S4, as shown in Figure 22.
After turn on, while the device remains on the necessary steady state gate current IG,steady is supplied from source VCC through RG. Please
refer to the article “A current-source concept for fast and efficient driving of silicon carbide transistors” by Dr. Jacek Rąbkowski for additional
information on this driving topology.⁴
VCC
S₁
VCC
S₂
L
VEE
S₃
RG
S₄
SiC SJT D
G
S
VEE
Figure 22: Simplified Inductive Pulsed Drive Topology
3 _{– RG = (1/RG1 +1/RG2)}-1_{. Driver is pre-installed with RG1 = RG2 = 7.5 Ω}
4 _{– Archives of Electrical Engineering. Volume 62, Issue 2, Pages 333–343, ISSN (Print) 0004-0746, DOI: 10.2478/aee-2013-0026, June 2013}
Feb 2016
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
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